Former Director, Product Management & Strategy, Teradyne

Former Director of Product Management & Strategy at Teradyne's Semiconductor Test division (2019–2024) with 30+ years in the semiconductor industry, led product strategy and market forecasting for digital test, burn-in, and system-level test platforms serving AI and high-performance computing chips. Owned TAM modeling methodology combining customer inputs, third-party data, and investor disclosures to guide R&D prioritization, while analyzing cost-of-test trends across wafer, packaged, and system-level insertions as the industry shifted to chiplets and advanced packaging; also led internal analysis on US–China trade restrictions and supply chain exposure. Prior to Teradyne, spent approximately 15 years at Intel in processor test and architecture roles, providing deep expertise in semiconductor test economics, OSAT dynamics, competitive positioning across Aehr/Teradyne/Advantest/Tokyo Electron, and thermal/liquid-cooled test environments for next-generation AI chips.