Thank you for elaborating on that process. Once you've tried placement and all that, you mentioned you were in conversation with Micron and TSMC, and in the end, due to ROI issues on TSMC's side, it didn't happen. I assume there could have been capacity for you to manufacture there. Have you heard of many capacity constraints still at TSMC and Intel? Has there been any development? I know it was perhaps worse in the past. How do you see this capacity constraint at the moment?

For me, I did not have a capacity issue because the chip I was designing was not on what they call a leading-edge node. The older nodes had more availability and capacity than the newer nodes. The newer nodes, between Nvidia, Apple, and others, have been consuming TSMC's volume. TSMC's leading node is superior to anything competitors are providing, so it has been selling out. Due to capacity issues and costs, multiple companies are looking at other foundries to get a better working relationship and hopefully priority, which is important to them.